A change in the current value of a
signal, which occurs when the signal is updated with its effective value.
The event is an important
concept in VHDL. It relates to signals and it occurs on a signal if
the current value of that signal changes. In other words, an event
on a signal is a change of the signal's value.
It is possible to check whether an event
occurred on a signal. Such an information can be obtained through the
predefined attribute 'EVENT. The principal application of this
attribute is checking for an edge of a clock signal (example 1). It
is also possible to check when the last event on a signal occurred
(attribute 'LAST_EVENT). See attributes for
An event on a signal, which
is on sensitivity list of a process or is a part of an expression in
a concurrent signal assignment, causes the process or assignment to
resume (invoke). See sensitivity
and resume for details.
if CLK'event and CLK='1'
. . .
The condition above will be true only on rising edge of the CLK
signal, i.e. when the actual value of the signal is '1' and there was
an event on it (the value changed recently).
Sensitivity list or sensitivity set require an event on any of their
signals, i.e. a change of the signal's value. A transaction (an
assignment to a signal, no matter whether the same or a different
value) is not enough.
The concept of event relates to signals only. There is no "event
on a variable" in VHDL.